Guided scrambling is a member of the multi-mode code. The feature of this technology is that guided scrambling only requires a simple mechanism to encode the data word into a plurality of sets of pseudo-random code words, and uses another mechanism to select the optimal set of code word.
FIG. 1 shows a schematic view of the structure of a conventional guided scrambling run length limited (RLL) coding device. As shown in FIG. 1, the number above the arrow indicates the amount of data in each region. If there are p guided bits, data candidate generating module 101 inserts p bits with value between 0–2p−1 in front of an (L-p)-bit data word and scrambles the word into 2p data word sequences for encoding. RLL coding module 102 receives 2p data word sequences and uses 2p sets of RLL coding circuits to code them into 2p code word sequences satisfying the (d, k) constrain, where d and k are the minimum and the maximum numbers of the consecutive zeros in the non-return to zero (NRZ) signals.
Selecting module 103 selects a code word sequence with the lowest direct current and low frequency components from the 2p code word sequences satisfying the (d, k) constrain for output. The selection is based on the calculation of digital sum value (DSV), that is, the difference of the number of bits between the high level and low level of all RLL code words prior to the calculation time; then, the minimum absolute value of the final DSV is outputted; alternatively, the DSV at different time is squared and accumulated, and the one with the minimum value is outputted. However, conventional guided scrambling RLL coding device requires a large number (i.e., 2p sets) of RLL coding circuitry, even though it improves the direct current and low frequency components of the RLL coding and avoids the appearance of synchronization pattern.
Guided scrambling shows good effects in direct current controlling for the RLL code words conversion, but the RLL coding circuitry is too complex. Therefore, the present invention focuses on a converting method and device satisfying two conditions: (1) the adding of the scrambled data words to the output RLL code words will not lose the control effect of the direct current and low frequency component, and (2) the RLL coding circuitry complexity is effectively reduced.